Senior Design Engineer at GEO Semiconductor, Inc.
Leo Wong is a(n) Senior Design Engineer working at GEO Semiconductor, Inc.
Get Leo Wong's email for freeName | Position | Contacts | ||
---|---|---|---|---|
XS | Xianfeng Sun | Principal EngineerGEO Semiconductor, Inc. | @geosemi.com(408) | Get contact |
HB | Hervé Brelay | Vice President, Software EngineeringGEO Semiconductor, Inc. | @geosemi.com(408) | Get contact |
KG | Kent Goodin | Vice President Hardware EngineeringGEO Semiconductor, Inc. | @geosemi.com(408) | Get contact |
PL | Peng Lin | CTO at GEO Semiconductor, Inc.GEO Semiconductor, Inc. | @geosemi.com(408) | Get contact |
MD | Manisha Deokar | s/w enggTrinity Convergence | @geosemi.com(408) | Get contact |
PJ | Pavan Jalwadi | Software EngineerTrinity Convergence | @geosemi.com(408) | Get contact |
DP | Deepak Patel | Team LeadTrinity Convergence | @geosemi.com(408) | Get contact |
Name | Position | Contacts | ||
---|---|---|---|---|
AS | Ankit Savaliya | Senior Design EngineerSTMicroelectronics | @st.com+41 2 | Get contact |
PD | Parag Deshpande | Senior Design EngineerSTMicroelectronics | @st.com+41 2 | Get contact |
LZ | Li Zhang | Senior Design EngineerSTMicroelectronics | @st.com+41 2 | Get contact |
DS | Davide Sanzogni | Senior Design EngineerSTMicroelectronics | @st.com+41 2 | Get contact |
RP | Ruchi Panwar | Senior Design EngineerSTMicroelectronics | @st.com+41 2 | Get contact |
BD | Benoit Durand | Senior Design EngineerSTMicroelectronics | @st.com+41 2 | Get contact |
MC | Massimo Caruso | Senior design engineerSTMicroelectronics | @st.com+41 2 | Get contact |
CC | Caroline Carin | Senior Design EngineerSTMicroelectronics | @st.com+41 2 | Get contact |
MC | Marco Carfi | Senior design engineerSTMicroelectronics | @st.com+41 2 | Get contact |
AM | Antonio Muscatello | Senior Design EngineerSTMicroelectronics | @st.com+41 2 | Get contact |