Asic/FPGA Design Engineer at FirstPass Engineering
Andrew Bailey is a(n) Asic/FPGA Design Engineer working at FirstPass Engineering.
Get Andrew Bailey's email for freeName | Position | Contacts | ||
---|---|---|---|---|
MG | Mark Griffith | Senior EngineerFirstPass Engineering | @fir….com(303) | Get contact |
EG | Erika Gibbs | Office Manager/ Bookkeeper/ FinanceFirstPass Engineering | @fir….com(303) | Get contact |
DJ | David Jenkins | Principal EngineerFirstPass Engineering | @fir….com(303) | Get contact |
BW | Bradley Whitlock | Senior ASIC and FPGA DesignerFirstPass Engineering | @fir….com(303) | Get contact |
BH | Byron Harris | Principal EngineerFirstPass Engineering | @fir….com(303) | Get contact |
HZ | Haitao Zheng | Senior ASIC/FPGA Design and Verification EngineerFirstPass Engineering | @fir….com(303) | Get contact |
RD | Randy Dupuis | Verification EngineerFirstPass Engineering | @fir….com(303) | Get contact |
DV | David Vavro | Principal EngineerFirstPass Engineering | @fir….com(303) | Get contact |
JL | James Li | Principle ASIC Verification EngineerFirstPass Engineering | @fir….com(303) | Get contact |
BH | Bruce Homer | Director Castle Rock Design CenterFirstPass Engineering | @fir….com(303) | Get contact |
Name | Position | Contacts | ||
---|---|---|---|---|
MU | Manolito Ulgado | Senior ASIC/FPGA Design EngineerAvago Technologies | @ava….com(408) | Get contact |
EE | Eric Eisenbrandt | ASIC/FPGA Design EngineerSyndiant, Inc | @syn….com(972) | Get contact |
JA | Jens Andreassen | ASIC/FPGA Design EngineerIntel Corporation | @intel.com(408) | Get contact |